
ESC Features supported (0x0008:0x0009)
II-12 Slave Controller – Register Description
3.8 ESC Features supported (0x0008:0x0009)
Table 11: Register ESC Features supported (0x0008:0x0009)
FMMU Operation:
0: Bit oriented
1: Byte oriented
Distributed Clocks:
0: Not available
1: Available
ESC20: 1
IP Core: depends on
configuration
ET1100: 1
ET1200: 1
Distributed Clocks (width):
0: 32 bit
1: 64 bit
ET1100: 1
ET1200: 1
IP Core: depends on
configuration
Others : 0
Low Jitter EBUS:
0: Not available, standard jitter
1: Available, jitter minimized
ET1100: 1
ET1200: 1
Others : 0
Enhanced Link Detection EBUS:
0: Not available
1: Available
ET1100: 1
ET1200: 1
Others : 0
Enhanced Link Detection MII:
0: Not available
1: Available
ET1100: 1
ET1200: 1
Others : 0
Separate Handling of FCS Errors:
0: Not supported
1: Supported, frames with wrong FCS and
additional nibble will be counted
separately in Forwarded RX Error
Counter
IP Core: 1
ET1100: 1
ET1200: 1
Others : 0
Enhanced DC SYNC Activation
0: Not available
1: Available
NOTE: This feature refers to registers 0x981[7:3],
0x0984
IP Core:
depends on version
Others : 0
EtherCAT LRW command support:
0: Supported
1: Not supported
EtherCAT read/write command support
(BRW, APRW, FPRW):
0: Supported
1: Not supported
Fixed FMMU/SyncManager configuration
0: Variable configuration
1: Fixed configuration (refer to
documentation of supporting ESCs)
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